USB AHB-Lite
- USB Full-Speed Bulk-Transfer Endpoint AHB-Lite SoC Module facilitates bulk transfers of data from a USB Endpoint to a Host
- Coded in SystemVerilog with an emphasis on the ASIC design aspects with regards to the AHB-Lite Slave Interface, Data Buffer, Protocol Controller, USB RX, and USB TX that consist of the submodules for the SoC top-level module